H9: Multiplexers, Decoders, and Encoders#

Time Estimate1-2 hours   Grade Impact1%   DueSep 14 @ 12pm  

Notes#

Show your work. You must show all steps of your work for full credit. While calculators can perform these calculations, demonstrating your process ensures understanding and mastery of the concepts.

Notation. To encourage flexibility between notations, the problems in this assignment use a variety of notations. We have discussed each style already; review the textbook or your notes if you need help.

Exercises#

1. A 16-to-1 multiplexer is built from four 4-to-1 multiplexers and one 4-to-1 multiplexer as a final stage. Sketch the hierarchy and explain how the select lines are reused at each level.

2. Design a decoder-based circuit that implements the sum of minterms $\Sigma m(1, 3, 4, 6, 9, 11, 12, 14)$. Explain why a decoder can simplify the implementation compared with directly constructing the logic from gates.

3. A 4-bit priority encoder receives inputs $D_3, D_2, D_1, D_0$, where $D_3$ has the highest priority. Write the output truth table, including a valid/invalid output, and explain how the circuit resolves multiple active inputs.

4. You are given a 2-to-1 MUX with inputs $A$ and $B$, select line $S$, and output $Y$. Show how to realize the Boolean function $Y = A\overline{B} + \overline{A}B$ using only this MUX and constants. Explain your mapping.

5. Compare a decoder, an encoder, and a multiplexer in terms of their information flow. For each device, describe what goes in, what comes out, and one practical use case in a digital system.

6. Construct a logic circuit for a 3-variable function using an 8-to-1 multiplexer where the data inputs are only $0$, $1$, a variable, or its complement. Choose a nontrivial function and justify each data-input assignment.

7. A student claims that any combinational logic function can be implemented with a single decoder and an OR gate. Is this always true? Explain under what conditions the claim works, and identify any limitations or cost concerns.

8. Design an active-low 3-to-8 decoder output pattern that would light exactly one LED for each input code. Then explain how active-low outputs change the way the LED connections should be wired.

9. Suppose a 4-to-2 encoder is used without priority logic and two inputs become active at the same time. Describe the ambiguity this creates and propose a modification that would make the circuit more robust.

10. A circuit uses multiplexers to implement a finite-state machine next-state function. Explain why multiplexers are often a good choice for this task, and discuss how the design would change if the number of state variables increased.